Please refer to FIG. 1, which shows the structure of the passive RFID system in the prior art. The electromagnetic induction is proceeded through the inductors L101 and L111 respectively implicit in the reader 01 and the tag 02, so that the energy and information can be transmitted therebetween for being identified. The inductor L101 is implicit in the resonance circuit 10 of the reader 01, and the inductor L111 is implicit in the resonance circuit 11 of the tag 02. The fixed radio frequency carrier signal emitted from the inductor L101 of the reader 01 is induced by the inductor L111 of the tag 02 and then serves as an AC power source. After that, the AC power source is converted into a DC voltage via the bridge rectifier circuit 12, which may be a full-wave bridge rectifier circuit composed of four diodes, or a half-wave bridge rectifier circuit 12 composed of two diodes. Then, a stable DC level is obtained via the RC low-pass filter 13 which provides a required DC voltage source for the oscillating circuit 15 and the digital logic circuit 16 of the tag 02. Accordingly, a system clock pulse is produced by the oscillating circuit 15 of the tag 02 in response to the provided voltage. The data to be transmitted is encoded and then modulated and sent out via the modulation circuit 17. When received by the reader 01, the transmitted data is demodulated by a detection circuit and then sent to a microprocessor control unit (MCU). Therefore, a predetermined corresponding operation can be performed by the MCU so as to accomplish the signal transmission.
However, in the conventional passive RFID system, the tag 02 is not connected to the ground so that it is easily affected by the interference of noise. In addition, the RC low-pass filter 13 is not able to provide sufficient filtering effect due to the limitations of space and costs for the integrated circuit. Hence, a high-frequency parasitic ripple is usually generated with the provided voltage from the RC low-pass filter 13, and thus the stability of the system clock pulse is affected.
In the conventional passive RFID system, the distance between the tag 02 and the reader 01 is unfixed while they are in operation. Accordingly, the magnitude of the induced voltage is greatly affected by the distance between the tag 02 and the reader 01. The closer the tag 02 and the reader 01 are, the greater the mutual induction therebetween will be. That is, the DC voltage increases as the tag 02 moves toward the reader 01 but decreases as the tag 02 moves away from the reader 01, which results in an instability of the system. In order to overcome the above drawbacks and stabilize the passive RFID system, a voltage limiter 14 is often used in addition to the bridge rectifier 12 and the RC low-pass filter 13. The voltage limiter 14 not only stabilizes the DC voltage, but also prevents the components from being damaged due to an excessive induced voltage.
In order to save power and reduce costs, the amplitude modulation (AM) technique is often employed in the conventional RFID system to proceed the signal transmission. More specifically, the carrier signals with different amplitudes received by the tag 02 are demodulated for representing the digital logic states including DATA 0 and DATA 1. That is, the correct digital logic states DATA 0 and DATA 1 are obtained through the amplitude modulation for the carrier signals, and thus the subsequent instructions can be performed according thereto. Nevertheless, there is no active power supply in the tag 02 of the passive RFID system, so the required DC voltage needs to be generated base on the carrier amplitude rectification by the bridge rectifier 12. Therefore, the DC voltage is directly affected by the magnitude of the carrier amplitude. When the DC voltage is subject to a significant variation or the carrier amplitude is too low, which causes the DC voltage to be insufficient, the tag 02 would not be operated normally.
Similarly, when the AM technique is applied in the modulation circuit 17 of the tag 02 for the data modulation and emission, the carrier signals from the reader 01 are switched by the digital logic states DATA 0 and DATA 1 from the digital logic circuit 16. The amplitude of the carrier signal from the LC resonance circuit 11 is modified and then emitted to the reader 01. But meanwhile, the voltage output from the bridge circuit 12 is immediately affected by the amplitude of the carrier signal from the LC resonance circuit 11. Consequently, the tag 02 will be malfunctioned if the resonance circuit 11 is unable to provide the sufficient carrier amplitude. Thus, the over-degradation of the operating voltage can be avoided if a minimum voltage level for limiting the carrier amplitude is provided.
Please refer to FIG. 2, which shows the structure of a tag for the passive RFID system in the prior art. As shown in FIG. 2, the carrier signal sent from the reader is induced by the inductor L211 in the LC resonance circuit 21 of the tag. At the tag, the mutual induction between the reader and the tag is proceeded through the inductors which are respectively implicit in the tag and the reader, and the induced voltage is generated accordingly. Then, the induced voltage is converted into a DC voltage via the full-wave bridge rectifier 22 composed of four diodes D221, D222, D223 and D224. Next, operating voltages VDDA and VSSA are obtained at the output of the RC low-pass filter 23, which is composed of the resistor R231 and the capacitor C232, for providing a required DC voltage for the digital logic circuit of the tag. The voltage limiter 24 is used for detecting whether the operating voltage is over-high through the voltage-dividing resistors R241 and R242 between the operating voltages VDDA and VSSA. And the transistor M243 linearly limits the increase of the operating voltage VDDA.
Firstly, the load for the operating voltage VDDA of the bridge rectifier 22 will be raised when the transistor M243 is employed to linearly limit the increase of the operating voltage VDDA. The raise of the load for the operating voltage VDDA is wasteful of the limited resource (converting efficiency) for the passive RFID system. Moreover, the load for the operating voltage VDDA would be changed when the transistor M243 is switched on or off, and this may affect the operation of the whole system. Furthermore, because the diodes D221, D222, D223 and D224 of the bridge rectifier 22 are characterized by the unidirectional rectification, higher peak voltages will occur at two ends HF and HF1 of the inductor L211 in the LC resonance circuit 21. Besides, the voltage limiter 24 cannot perform the voltage-limiting function for the LC resonance circuit 21 since the voltage limiter 24 is connected downstream of the bridge rectifier 22. Therefore, the voltage level of the voltage limiter 24 should be lowered to ensure a normal operation under the limited voltage endurance. This results in the degradation of the operating voltage for the tag, and hence the transmission distance is also reduced thereby.
As shown in FIG. 2, the AM modulation circuit M251 for the tag is disposed between two ends HF and HF1 of the inductor L211 in the LC resonance circuit 21. The voltage difference between the two ends HF and HF1 of the inductor L211 is short-circuited when the data transmitted from the modulation terminal TXD is DATA 1, which lowers the peak voltages at the two ends of HF and HF1. This causes the operating voltage VDDA from the bridge rectifier 22 to be over-low, as shown in FIG. 3, and thus the whole circuit is unable to be continuously operated.
Please refer to FIG. 4, which shows the structure of another tag for the passive RFID system in the prior art. As shown in FIG. 4, the modulation circuit M252 is disposed between the operating voltage VSSA of the bridge rectifier 22 and one end HF1 of the inductor L211 of the LC resonance circuit 21 for modulation. In this way, the insufficiency of the operating voltage is solved due to the unilateral modulation between the HF1 and the operating voltage VSSA. However, the induced modulation distance between the tag and the reader will be shortened, so the sensitivity of the demodulation circuit has to be strengthened for compensation.
In order to overcome the drawbacks in the prior art, a power processing interface for passive RFID is provided. The particular design in the present invention not only solves the problems described above, but also is easy to be implemented. Thus, the present invention has the utility for the industry.